A: Initial

research/00-overview/overview.md

@@ -0,0 +1,3 @@
+# overview
+
+SOON

research/00-overview/questions.md

@@ -0,0 +1,3 @@
+# questions
+
+SOON

research/00-overview/research-goals.md

@@ -0,0 +1,3 @@
+# research goals
+
+SOON

research/00-overview/status.md

@@ -0,0 +1,3 @@
+# status
+
+SOON

research/00-overview/terminology.md

@@ -0,0 +1,3 @@
+# terminology
+
+SOON

research/01-architecture/alternatives.md

@@ -0,0 +1,3 @@
+# alternatives
+
+SOON

research/01-architecture/architecture-overview.md

@@ -0,0 +1,3 @@
+# architecture overview
+
+SOON

research/01-architecture/block-diagrams.md

@@ -0,0 +1,3 @@
+# block diagrams
+
+SOON

research/01-architecture/constraints.md

@@ -0,0 +1,3 @@
+# constraints
+
+SOON

research/01-architecture/design-space.md

@@ -0,0 +1,3 @@
+# design space
+
+SOON

research/01-architecture/microarchitecture.md

@@ -0,0 +1,3 @@
+# microarchitecture
+
+SOON

research/01-architecture/requirements.md

@@ -0,0 +1,3 @@
+# requirements
+
+SOON

research/02-riscv/base-isa.md

@@ -0,0 +1,3 @@
+# base isa
+
+SOON

research/02-riscv/csr.md

@@ -0,0 +1,3 @@
+# csr
+
+SOON

research/02-riscv/custom-extensions.md

@@ -0,0 +1,3 @@
+# custom extensions
+
+SOON

research/02-riscv/exceptions.md

@@ -0,0 +1,3 @@
+# exceptions
+
+SOON

research/02-riscv/extensions.md

@@ -0,0 +1,3 @@
+# extensions
+
+SOON

research/02-riscv/interrupts.md

@@ -0,0 +1,3 @@
+# interrupts
+
+SOON

research/02-riscv/isa-overview.md

@@ -0,0 +1,3 @@
+# isa overview
+
+SOON

research/02-riscv/privilege-model.md

@@ -0,0 +1,3 @@
+# privilege model
+
+SOON

research/03-core-design/alu.md

@@ -0,0 +1,3 @@
+# alu
+
+SOON

research/03-core-design/branch-unit.md

@@ -0,0 +1,3 @@
+# branch unit
+
+SOON

research/03-core-design/control-unit.md

@@ -0,0 +1,3 @@
+# control unit
+
+SOON

research/03-core-design/core-overview.md

@@ -0,0 +1,3 @@
+# core overview
+
+SOON

research/03-core-design/datapath.md

@@ -0,0 +1,3 @@
+# datapath
+
+SOON

research/03-core-design/decoder.md

@@ -0,0 +1,3 @@
+# decoder
+
+SOON

research/03-core-design/load-store-unit.md

@@ -0,0 +1,3 @@
+# load store unit
+
+SOON

research/03-core-design/mul-div-unit.md

@@ -0,0 +1,3 @@
+# mul div unit
+
+SOON

research/03-core-design/pipeline.md

@@ -0,0 +1,3 @@
+# pipeline
+
+SOON

research/03-core-design/register-file.md

@@ -0,0 +1,3 @@
+# register file
+
+SOON

research/04-128-core/clusters.md

@@ -0,0 +1,3 @@
+# clusters
+
+SOON

research/04-128-core/core-communication.md

@@ -0,0 +1,3 @@
+# core communication
+
+SOON

research/04-128-core/core-numbering.md

@@ -0,0 +1,3 @@
+# core numbering
+
+SOON

research/04-128-core/core-organization.md

@@ -0,0 +1,3 @@
+# core organization
+
+SOON

research/04-128-core/inter-core-interrupts.md

@@ -0,0 +1,3 @@
+# inter core interrupts
+
+SOON

research/04-128-core/overview.md

@@ -0,0 +1,3 @@
+# overview
+
+SOON

research/04-128-core/scalability.md

@@ -0,0 +1,3 @@
+# scalability
+
+SOON

research/04-128-core/synchronization.md

@@ -0,0 +1,3 @@
+# synchronization
+
+SOON

research/04-128-core/topology.md

@@ -0,0 +1,3 @@
+# topology
+
+SOON

research/05-memory/address-space.md

@@ -0,0 +1,3 @@
+# address space
+
+SOON

research/05-memory/atomics.md

@@ -0,0 +1,3 @@
+# atomics
+
+SOON

research/05-memory/cache-coherency.md

@@ -0,0 +1,3 @@
+# cache coherency
+
+SOON

research/05-memory/cache-research.md

@@ -0,0 +1,3 @@
+# cache research
+
+SOON

research/05-memory/memory-architecture.md

@@ -0,0 +1,3 @@
+# memory architecture
+
+SOON

research/05-memory/memory-bandwidth.md

@@ -0,0 +1,3 @@
+# memory bandwidth
+
+SOON

research/05-memory/memory-hierarchy.md

@@ -0,0 +1,3 @@
+# memory hierarchy
+
+SOON

research/05-memory/memory-map.md

@@ -0,0 +1,3 @@
+# memory map
+
+SOON

research/05-memory/memory-ordering.md

@@ -0,0 +1,3 @@
+# memory ordering
+
+SOON

research/06-interconnect/arbitration.md

@@ -0,0 +1,3 @@
+# arbitration
+
+SOON

research/06-interconnect/bandwidth.md

@@ -0,0 +1,3 @@
+# bandwidth
+
+SOON

research/06-interconnect/flow-control.md

@@ -0,0 +1,3 @@
+# flow control
+
+SOON

research/06-interconnect/latency.md

@@ -0,0 +1,3 @@
+# latency
+
+SOON

research/06-interconnect/overview.md

@@ -0,0 +1,3 @@
+# overview
+
+SOON

research/06-interconnect/protocol.md

@@ -0,0 +1,3 @@
+# protocol
+
+SOON

research/06-interconnect/routing.md

@@ -0,0 +1,3 @@
+# routing
+
+SOON

research/06-interconnect/scalability.md

@@ -0,0 +1,3 @@
+# scalability
+
+SOON

research/06-interconnect/topology.md

@@ -0,0 +1,3 @@
+# topology
+
+SOON

research/07-branch-prediction/bht.md

@@ -0,0 +1,3 @@
+# bht
+
+SOON

research/07-branch-prediction/branch-history.md

@@ -0,0 +1,3 @@
+# branch history
+
+SOON

research/07-branch-prediction/btb.md

@@ -0,0 +1,3 @@
+# btb
+
+SOON

research/07-branch-prediction/experiments.md

@@ -0,0 +1,3 @@
+# experiments
+
+SOON

research/07-branch-prediction/overview.md

@@ -0,0 +1,3 @@
+# overview
+
+SOON

research/07-branch-prediction/prediction-algorithms.md

@@ -0,0 +1,3 @@
+# prediction algorithms
+
+SOON

research/07-branch-prediction/ras.md

@@ -0,0 +1,3 @@
+# ras
+
+SOON

research/08-cache/cache-benchmarks.md

@@ -0,0 +1,3 @@
+# cache benchmarks
+
+SOON

research/08-cache/coherency.md

@@ -0,0 +1,3 @@
+# coherency
+
+SOON

research/08-cache/l1.md

@@ -0,0 +1,3 @@
+# l1
+
+SOON

research/08-cache/l2.md

@@ -0,0 +1,3 @@
+# l2
+
+SOON

research/08-cache/l3.md

@@ -0,0 +1,3 @@
+# l3
+
+SOON

research/08-cache/overview.md

@@ -0,0 +1,3 @@
+# overview
+
+SOON

research/08-cache/prefetching.md

@@ -0,0 +1,3 @@
+# prefetching
+
+SOON

research/08-cache/replacement-policy.md

@@ -0,0 +1,3 @@
+# replacement policy
+
+SOON

research/09-multicore/atomics.md

@@ -0,0 +1,3 @@
+# atomics
+
+SOON

research/09-multicore/barriers.md

@@ -0,0 +1,3 @@
+# barriers
+
+SOON

research/09-multicore/contention.md

@@ -0,0 +1,3 @@
+# contention
+
+SOON

research/09-multicore/load-balancing.md

@@ -0,0 +1,3 @@
+# load balancing
+
+SOON

research/09-multicore/locks.md

@@ -0,0 +1,3 @@
+# locks
+
+SOON

research/09-multicore/parallelism.md

@@ -0,0 +1,3 @@
+# parallelism
+
+SOON

research/09-multicore/scaling.md

@@ -0,0 +1,3 @@
+# scaling
+
+SOON

research/09-multicore/scheduling.md

@@ -0,0 +1,3 @@
+# scheduling
+
+SOON

research/10-verification/core-verification.md

@@ -0,0 +1,3 @@
+# core verification
+
+SOON

research/10-verification/fault-injection.md

@@ -0,0 +1,3 @@
+# fault injection
+
+SOON

research/10-verification/formal-verification.md

@@ -0,0 +1,3 @@
+# formal verification
+
+SOON

research/10-verification/isa-compliance.md

@@ -0,0 +1,3 @@
+# isa compliance
+
+SOON

research/10-verification/multicore-verification.md

@@ -0,0 +1,3 @@
+# multicore verification
+
+SOON

research/10-verification/regression.md

@@ -0,0 +1,3 @@
+# regression
+
+SOON

research/10-verification/strategy.md

@@ -0,0 +1,3 @@
+# strategy
+
+SOON

research/10-verification/unit-verification.md

@@ -0,0 +1,3 @@
+# unit verification
+
+SOON

research/11-simulation/behavioral-model.md

@@ -0,0 +1,3 @@
+# behavioral model
+
+SOON

research/11-simulation/cycle-accurate-model.md

@@ -0,0 +1,3 @@
+# cycle accurate model
+
+SOON

research/11-simulation/rtl-simulation.md

@@ -0,0 +1,3 @@
+# rtl simulation
+
+SOON

research/11-simulation/simulation-overview.md

@@ -0,0 +1,3 @@
+# simulation overview
+
+SOON

research/11-simulation/simulators.md

@@ -0,0 +1,3 @@
+# simulators
+
+SOON

research/11-simulation/testbenches.md

@@ -0,0 +1,3 @@
+# testbenches
+
+SOON

research/11-simulation/waveforms.md

@@ -0,0 +1,3 @@
+# waveforms
+
+SOON

research/12-performance/benchmarks.md

@@ -0,0 +1,3 @@
+# benchmarks
+
+SOON

research/12-performance/bottlenecks.md

@@ -0,0 +1,3 @@
+# bottlenecks
+
+SOON

research/12-performance/interconnect-performance.md

@@ -0,0 +1,3 @@
+# interconnect performance
+
+SOON

research/12-performance/memory-performance.md

@@ -0,0 +1,3 @@
+# memory performance
+
+SOON

research/12-performance/methodology.md

@@ -0,0 +1,3 @@
+# methodology
+
+SOON