4.0 KiB
Frequently Asked Questions
General
What is ReviveSparc?
ReviveSparc is a clean-room reimplementation of the OpenSPARC ISA (instruction set architecture). It aims to provide a fully open-source, legally unencumbered implementation of the SPARC V9 architecture that can run operating systems and software.
Is this affiliated with Oracle?
No. ReviveSparc is an independent open-source project. OpenSPARC and SPARC are trademarks of Oracle Corporation. We are not affiliated with or endorsed by Oracle.
Why SPARC? Isn't it dead?
SPARC is still used in mission-critical systems, particularly in aerospace, defense, and high-reliability computing. The Fujitsu SPARC64 processors power Japan's Fugaku supercomputer. The architecture is elegant and well-documented, making it ideal for educational use. ReviveSparc aims to preserve the architecture for future generations.
Technical
What is the "clean room" process?
Developers implementing ReviveSparc have no access to the original OpenSPARC source code. We work exclusively from publicly available specification documents:
- SPARC Architecture Manual Version 9
- UltraSPARC T1/T2 Supplements
- VIS Instruction Set Manual
This ensures the code is entirely original and free from any AT&T licensing concerns that affected the original OpenSPARC codebase.
What operating systems can run?
- Linux (6.x series, full support)
- NetBSD (10.x, full support)
- OpenBSD (7.x, in progress)
- Bare-metal programs (any ELF binary for SPARC V9)
How fast is the emulator?
On a modern x86_64 system:
- Single-core, JIT disabled: ~50 MIPS
- Single-core, JIT enabled: ~200 MIPS
- 8-core, JIT enabled: ~800 MIPS aggregate
Performance is sufficient to boot Linux in a few seconds.
Can I synthesize the RTL on an FPGA?
Yes. The Verilog RTL has been tested on:
- Xilinx Virtex-7 (XC7VX485T) — 4 cores at 50 MHz
- Xilinx Kintex-7 (XC7K325T) — 2 cores at 75 MHz
- Intel Arria 10 — 4 cores at 100 MHz
See the RTL Synthesis Guide for details.
Project
How can I contribute?
See the Community page for details. We welcome code contributions, documentation, testing, and hardware verification.
What license is used?
BSD 2-Clause License. This permits both open-source and proprietary use, with minimal restrictions.
Does ReviveSparc include any AT&T code?
No. ReviveSparc is a complete from-scratch reimplementation. Every line of code is original and written solely from the architecture specification.
Are there plans for SPARC V8 (32-bit) support?
The emulator includes a SPARC V8 compatibility mode that handles 32-bit code. Pure 32-bit SPARC V8 is not a primary target, but the majority of V8 instructions are supported through the V9 backward compatibility features.
Can I run Solaris?
Solaris 10 and Solaris 11 for SPARC are not currently supported. The primary targets are open-source operating systems. If you'd like to contribute Solaris support, please reach out on the mailing list.
Why not just use QEMU's SPARC target?
QEMU's SPARC target is excellent for running SPARC binaries, but it is a functional emulator with less emphasis on:
- Cycle-accurate pipeline modeling
- Hardware synthesis targets
- Educational clarity
ReviveSparc complements QEMU by providing a reference implementation suitable for hardware design and teaching.
Build Issues
make fails with "undefined reference"
Ensure you have all dependencies installed. See the Build Guide for your platform.
The emulator crashes on startup
Run with debug output enabled:
./sparc-emu -d -v kernel.bin
This will show detailed trace information. File a bug report with the output.
Linux kernel hangs during boot
Common causes:
- Missing or incorrect device tree blob (use the DTB from
revivesparc.dtb) - Incorrect kernel command-line parameters
- Kernel built without ReviveSparc platform support
Try booting with -append "earlyprintk debug" to see kernel messages.