From ac7a7ff35d90e4a708dd59c95db852e4429dd3a1 Mon Sep 17 00:00:00 2001 From: allexanderbergmns Date: Wed, 26 Aug 2026 18:42:44 +0200 Subject: [PATCH] Updates --- docs.html | 6 +++--- docs/faq.md | 4 ++-- docs/rtl-synthesis.md | 2 +- index.html | 1 + news.html | 22 +++++++++------------- news.json | 7 +++++++ roadmap.html | 33 +++++++++------------------------ roadmap.json | 17 +++++++++++++++++ 8 files changed, 49 insertions(+), 43 deletions(-) diff --git a/docs.html b/docs.html index 038e229..7e040fe 100644 --- a/docs.html +++ b/docs.html @@ -387,7 +387,7 @@ See the [RTL Synthesis Guide](rtl-synthesis.md) for details. ### How can I contribute? -See the [Community page](../community.html) for details. We welcome code contributions, documentation, testing, and hardware verification. +The source repository and issue tracker are hosted on our Git instance at [git.revivesparc.com/Revivesparc/revivesparc](https://git.revivesparc.com/Revivesparc/revivesparc). See the [Community page](../community.html) for details. We welcome code contributions, documentation, testing, and hardware verification. ### What license is used? @@ -428,7 +428,7 @@ Run with debug output enabled: ./sparc-emu -d -v kernel.bin ``` -This will show detailed trace information. File a bug report with the output. +This will show detailed trace information. File a bug report on the [issue tracker](https://git.revivesparc.com/Revivesparc/revivesparc/issues) with the output. ### Linux kernel hangs during boot @@ -1098,7 +1098,7 @@ This connects the emulator's debugger to the FPGA-resident cores, allowing regis 1. Write a Verilog testbench in `rtl/tb/` 2. Verify with Verilator: `make rtl-test` 3. Ensure lint passes: `make rtl-lint` -4. Submit a pull request with simulation results +4. Submit a pull request on the [Git instance](https://git.revivesparc.com/Revivesparc/revivesparc) with simulation results - diff --git a/news.json b/news.json index 03878ee..85b27b3 100644 --- a/news.json +++ b/news.json @@ -1,4 +1,11 @@ [ + { + "date": "2026-08-26", + "title": "Repository moved to self-hosted Git instance", + "body": "Development has moved from GitHub to our self-hosted Git instance. The source repository, issue tracker, and pull requests now live at git.revivesparc.com/Revivesparc/revivesparc.", + "link": "https://git.revivesparc.com/Revivesparc/revivesparc", + "linkText": "Visit the Repository" + }, { "date": "2026-06-15", "title": "ReviveSparc Initial Development", diff --git a/roadmap.html b/roadmap.html index 736fc6e..cb79411 100644 --- a/roadmap.html +++ b/roadmap.html @@ -46,31 +46,9 @@

ReviveSparc is released under the BSD 2-Clause License.

- - diff --git a/roadmap.json b/roadmap.json index 21f3a8d..9904f85 100644 --- a/roadmap.json +++ b/roadmap.json @@ -1,5 +1,15 @@ { "milestones": [ + { + "version": "v0.0.1", + "title": "Initial structure", + "status": "released", + "date": "Aug 2026", + "items": [ + "Initial repository structure", + "Moved source repository, issue tracker, and pull requests to self-hosted Git instance (git.revivesparc.com/Revivesparc/revivesparc)" + ] + }, { "version": "v0.4.0", "title": "Full User-Space ISA", @@ -13,5 +23,12 @@ "Comprehensive ISA test suite: ~12,000 test cases" ] } + ], + "future": [ + "SPARC V9e extensions — VIS 3, integer multiply-add, SHA-3 instructions", + "Vector processing unit — SIMD engine inspired by SPARC64 VIIIfx", + "PCIe host bridge — Allow real hardware peripherals in emulation", + "GDB JTAG bridge — Connect GDB to FPGA-resident cores", + "WebAssembly backend — Run ReviveSparc in the browser" ] }