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# Frequently Asked Questions
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## General
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### What is ReviveSparc?
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ReviveSparc is a clean-room reimplementation of the OpenSPARC ISA (instruction set architecture). It aims to provide a fully open-source, legally unencumbered implementation of the SPARC V9 architecture that can run operating systems and software.
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### Is this affiliated with Oracle?
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No. ReviveSparc is an independent open-source project. OpenSPARC and SPARC are trademarks of Oracle Corporation. We are not affiliated with or endorsed by Oracle.
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### Why SPARC? Isn't it dead?
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SPARC is still used in mission-critical systems, particularly in aerospace, defense, and high-reliability computing. The Fujitsu SPARC64 processors power Japan's Fugaku supercomputer. The architecture is elegant and well-documented, making it ideal for educational use. ReviveSparc aims to preserve the architecture for future generations.
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## Technical
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### What is the "clean room" process?
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Developers implementing ReviveSparc have **no access** to the original OpenSPARC source code. We work exclusively from publicly available specification documents:
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- SPARC Architecture Manual Version 9
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- UltraSPARC T1/T2 Supplements
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- VIS Instruction Set Manual
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This ensures the code is entirely original and free from any AT&T licensing concerns that affected the original OpenSPARC codebase.
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### What operating systems can run?
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- **Linux** (6.x series, full support)
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- **NetBSD** (10.x, full support)
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- **OpenBSD** (7.x, in progress)
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- **Bare-metal programs** (any ELF binary for SPARC V9)
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### How fast is the emulator?
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On a modern x86_64 system:
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- Single-core, JIT disabled: ~50 MIPS
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- Single-core, JIT enabled: ~200 MIPS
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- 8-core, JIT enabled: ~800 MIPS aggregate
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Performance is sufficient to boot Linux in a few seconds.
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### Can I synthesize the RTL on an FPGA?
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Yes. The Verilog RTL has been tested on:
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- Xilinx Virtex-7 (XC7VX485T) — 4 cores at 50 MHz
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- Xilinx Kintex-7 (XC7K325T) — 2 cores at 75 MHz
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- Intel Arria 10 — 4 cores at 100 MHz
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See the [RTL Synthesis Guide](rtl-synthesis.md) for details.
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## Project
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### How can I contribute?
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See the [Community page](../community.html) for details. We welcome code contributions, documentation, testing, and hardware verification.
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### What license is used?
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BSD 2-Clause License. This permits both open-source and proprietary use, with minimal restrictions.
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### Does ReviveSparc include any AT&T code?
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No. ReviveSparc is a complete from-scratch reimplementation. Every line of code is original and written solely from the architecture specification.
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### Are there plans for SPARC V8 (32-bit) support?
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The emulator includes a SPARC V8 compatibility mode that handles 32-bit code. Pure 32-bit SPARC V8 is not a primary target, but the majority of V8 instructions are supported through the V9 backward compatibility features.
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### Can I run Solaris?
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Solaris 10 and Solaris 11 for SPARC are not currently supported. The primary targets are open-source operating systems. If you'd like to contribute Solaris support, please reach out on the mailing list.
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### Why not just use QEMU's SPARC target?
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QEMU's SPARC target is excellent for running SPARC binaries, but it is a functional emulator with less emphasis on:
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- Cycle-accurate pipeline modeling
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- Hardware synthesis targets
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- Educational clarity
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ReviveSparc complements QEMU by providing a reference implementation suitable for hardware design and teaching.
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## Build Issues
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### `make` fails with "undefined reference"
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Ensure you have all dependencies installed. See the [Build Guide](build-guide.md) for your platform.
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### The emulator crashes on startup
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Run with debug output enabled:
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```bash
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./sparc-emu -d -v kernel.bin
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```
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This will show detailed trace information. File a bug report with the output.
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### Linux kernel hangs during boot
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Common causes:
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- Missing or incorrect device tree blob (use the DTB from `revivesparc.dtb`)
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- Incorrect kernel command-line parameters
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- Kernel built without ReviveSparc platform support
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Try booting with `-append "earlyprintk debug"` to see kernel messages.
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